1. Field of the Invention
The present invention relates to a printed circuit board by which signal noises, particularly intersymbol interference, can be reduced.
2. Description of the Related Art
In recent years, it becomes difficult to discriminate a symbol of a digital signal due to intersymbol interference in a transmission line on a printed circuit board as transmission speed of the digital signal in electronic equipment becomes higher, whereby an operation margin of the circuit deteriorates. Here, it should be note that the intersymbol interference is the interference which occurs between temporally adjacent digital symbols. In a case where signal transmission speed is high, a next digital signal is transmitted before the waveform of a previously transmitted digital signal converges, whereby the previously transmitted signal becomes a noise for the currently transmitted signal. In any case, it is said that, when the signal transmission speed exceeds 1 Gbps, the intersymbol interference becomes conspicuous and thus affects a circuit operation.
Subsequently, the concrete mechanism of the intersymbol interference will be described. When the signal transmission speed exceeds 1 Gbps, a high-frequency component of a signal attenuates due to a skin effect and a dielectric loss on the transmission line, and thus the waveform of the signal becomes dull. Consequently, a ratio of a rise time of the waveform to a signal period increases.
First, a state of a transmission waveform in a case where digital symbols “1” and “0” are periodically switched over is considered. That is, the waveform of the signal output from a transmission terminal is dull at a receiving end due to attenuation of the high-frequency component of the signal on the transmission line. When a symbol switchover time of the digital signal is shorter than the rise time of this signal, the switchover of the symbol starts before a signal voltage has sufficiently risen.
Next, a state of the transmission waveform in a case where the digital symbol “1” or “0” is consecutive (for example, a plurality of “1” are consecutive and are then switched over to “0”, such as “1”→“1”→“1”→“0”) will be described. In this case, the waveform does not completely rise in the period of the first “1”, but the signal rises substantially up to a saturation voltage as the second “1” and the third “1” are consecutively arranged. Therefore, the switchover of the symbol starts from the voltage near the saturation voltage. Here, it should be noted that the saturation voltage indicates the voltage in a state that the output waveform of the transmission element has completely risen.
As just described, the voltage at the time when the symbol is switched over is different between the state that the same symbols are consecutive before the switchover and the state that the same symbols are not consecutive before the switchover. Further, after the symbol was switched over, an attaining voltage is different according to a length of the consecutiveness of the same symbols. Therefore, the attaining voltage in the period of each symbol is different according to the past state of the symbol.
In a case where the signal waveforms in the above states are displayed as the eye pattern, as illustrated in FIG. 8A, widths 801 and 802 are provided as the signal amplitudes. When the widths 801 and 802 increase, it becomes impossible to obtain the signal amplitude sufficient for the circuit operation, whereby a voltage margin of the circuit deteriorates. For this reason, to prevent such inconvenience, it is required to reduce the widths 801 and 802.
Further, when a starting voltage of a symbol change is different, a time margin of the circuit deteriorates. This is because, when the starting voltage of the symbol change is different due to the intersymbol interference, a time (timing) when the signal passes a threshold voltage by which the symbol is discriminated is different even when the signal changes by taking a same rise time. When the signal waveform in this state is displayed as the eye pattern, as illustrated in FIG. 8A, a width (timing jitter) 800 is observed at the time when the signal passes the threshold voltage. To reduce the timing jitter 800 achieves stability of the circuit operation.
Hereinafter, a technique of eliminating the above-described intersymbol interference will be explained. Since the intersymbol interference is caused by attenuation of the high-frequency component of the signal, a circuit which has a function to correct the amplitude of the high-frequency component of the signal is built into a semiconductor device, whereby the high-frequency component attenuating on the transmission line is corrected. In general terms, there are two kinds of methods of correcting the high-frequency component, that is, one is the method of correcting the high-frequency component in the semiconductor device on the transmission side, and the other is the method of correcting the high-frequency component in the semiconductor device on the receiving side.
The attaining voltage of the semiconductor device on the transmission side at the signal rise time is the saturation voltage, whereas the method of lowering, than the saturation voltage, the amplitude in the state that the symbol does not change and thus the same symbols are consecutive is called de-emphasis. In this method, since the amplitude at the signal rise time is higher than the amplitude in the state that the same symbols are consecutive, a difference between the amplitude of the high-frequency component at the signal rise time and the amplitude in the state that the same symbols are consecutive can be made small at the receiving side even if the high-frequency component at the signal rise time attenuates on the transmission line. On the other hand, the method of correcting the frequency component of the high-frequency component in the semiconductor device on the receiving side is called equalizer. In this method, a difference between the amplitude of the high-frequency component at the signal rise time and the amplitude in the state that the same symbols are consecutive can be made small by amplifying the amplitude at the signal rise time on the receiving side.
When the amplitude correction according to the signal attenuation amount on the transmission line is performed by applying such techniques as above, the amplitude of the high-frequency component which has attenuated on the transmission line can be made constant at the receiving side. Therefore, the start voltage of the symbol change can be made constant, and thus the timing jitter can be reduced.
However, when the circuit having the amplitude correction function is built into the semiconductor device, the area of the semiconductor device resultingly increases, and also power consumption resultingly increases. In consideration of such inconvenience, U.S. Patent Application Publication 2006/0197679 discloses a technique of correcting a high-frequency component of a signal by means of parts and wirings on a printed circuit board without having a correction function circuit built in a semiconductor device.
In U.S. Patent Application Publication 2006/0197679, an output terminal of a transmission circuit and an input terminal of a receiving circuit are connected through a first transmission line (transmission line), and one end of a second transmission line (high-impedance transmission line) of which the impedance is higher than that of the transmission line is connected to the connection portion between the transmission line and the input terminal of the receiving circuit. Thus, a signal amplitude at the input terminal of the receiving circuit is amplified by using a reflection occurred due to impedance mismatching at the connection portion.
Further, a terminating resistor of which the electric resistance is lower than the impedance of the high-impedance transmission line is connected to the other end of the high-impedance transmission line for termination. Thus, a negative reflection at the connection point between the high-impedance transmission line and the terminating resistor is returned to the connection portion of the transmission line and the input terminal of the receiving circuit, and the voltage at the input terminal of the receiving circuit once amplified returns to the original voltage immediately. As just described, since an edge of the signal can be steepened by increasing the amplitude at the signal rise time, it is possible to have the effect of the equalizer, whereby it is possible to reduce the timing jitter.
However, in U.S. Patent Application Publication 2006/0197679, a problem that the timing jitter could not be reduced when the output impedance of the transmission circuit and the impedance of the transmission line were not matching with each other turned out.
In U.S. Patent Application Publication 2006/0197679, the signal is amplified by using the reflection at the connection portion between the receiving circuit and the high-impedance transmission line, and a reflected wave caused by the reflection propagates also to the transmission line. For this reason, when the output impedance of the transmission circuit and the impedance of the transmission line are not matching with each other, the signal wave is again reflected at the output terminal of the transmission circuit. Thus, the signal wave obtained by adding together the reflected wave and the original signal wave newly propagates to the input terminal of the receiving circuit.
Since the signal which has been affected by such multiple reflection contributes to the intersymbol interference on the transmission line, the timing jitter increases as compared with a case where the output impedance of the transmission circuit and the impedance of the transmission line are matching with each other.
In particular, when the circuit is operated at high speed, the impedance of the transmission line is about 50[Ω], and the output impedance of the transmission circuit is about 20 to 30[Ω]. Thus, it is often the case where the impedances of the transmission circuit and the transmission line are not matching with each other.